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x86_64

This is just a quick reference sheet for developers.

  • Code Alignment: 16 bytes

Registers

The order of the registers is typically as follows for Microsoft x64 ABI: rcx, rdx, r8, r9, then the rest of the parameters are pushed onto the stack in reverse order (right-to-left).

For the System V ABI on x64: rdi, rsi, rdx, rcx, r8, r9, then the rest of the parameters are pushed onto the stack in reverse order (right-to-left).

Register Microsoft x64 ABI SystemV ABI
rax Caller-saved Caller-saved
rbx Callee-saved Callee-saved
rcx Caller-saved, 1st parameter Caller-saved, 4th parameter
rdx Caller-saved, 2nd parameter Caller-saved, 3rd parameter
rsi Caller-saved Caller-saved, 2nd parameter
rdi Caller-saved Caller-saved, 1st parameter
rbp Callee-saved Callee-saved
rsp Callee-saved Callee-saved
r8 Caller-saved, 3rd parameter Caller-saved, 5th parameter
r9 Caller-saved, 4th parameter Caller-saved, 6th parameter
r10 Caller-saved Caller-saved
r11 Caller-saved Caller-saved
r12 Callee-saved Callee-saved
r13 Callee-saved Callee-saved
r14 Callee-saved Callee-saved
r15 Callee-saved Callee-saved

Floating Point Registers (Microsoft)

Register Microsoft x64 ABI
st(0)-st(7) Caller-saved
mm0-mm7 Caller-saved
xmm0-xmm5 Caller-saved, used for floating point parameters.
ymm0-zmm5 Caller-saved, used for floating point parameters.
zmm0-zmm5 Caller-saved, used for floating point parameters.
xmm6-xmm15 Callee-saved.
ymm6-ymm15 Callee-saved. Upper half must be preserved by the caller
zmm6-zmm31 Callee-saved. Upper half must be preserved by the caller

Floating Point Registers (SystemV)

Register SystemV ABI
st(0)-st(7) Caller-saved
mm0-mm7 Caller-saved
xmm0-xmm7 Caller-saved, used for floating point parameters
ymm0-zmm7 Caller-saved, used for floating point parameters
zmm0-zmm7 Caller-saved, used for floating point parameters
xmm8-xmm15 Caller-saved
ymm8-ymm15 Caller-saved, used for floating point parameters
zmm8-zmm31 Caller-saved, used for floating point parameters

On Linux, syscalls use R10 instead of RCX in SystemV ABI

Intel APX

Information sourced from Source.

Future Intel processors are expected to ship with APX, extending the registers to 32 by adding R16-R31.

These future registers are expected to be caller saved.

To quote document:

Defining all new state (Intel® APX’s EGPRs) as volatile (caller-saved or scratch)

Calling Convention Inference

It is recommended library users manually specify conventions in their hook functions."

When the calling convention of <your function> is not specified, wrapper libraries must insert the appropriate default convention in their wrappers.

Rust

  • x86_64-pc-windows-gnu: Microsoft
  • x86_64-pc-windows-msvc: Microsoft
  • x86_64-unknown-linux-gnu: SystemV
  • x86_64-apple-darwin: SystemV

C

  • Windows x64: Microsoft
  • Linux x64: SystemV
  • macOS x64: SystemV